Field of the Disclosure
The disclosure relates to an integrated circuit device. More particularly, the disclosure relates to an integrated circuit device in which portion of the interconnect lines are replaced by bonding wires.
Description of Related Art
Metallic interconnect is commonly used for internal electrical transmission of the integrated circuit device, wherein the connection way and the connection path is through the design conducted by the integrated circuit design process. Since the metallic interconnect is fabricated by photolithographic and etching process, all the configuration, length and width will be affected by the limitation of technology of process, and thus the electrical performance of the connection is also limited. On the other hand, wire bonding technique is commonly used to perform the electrical transmission between the terminal of the integrated circuit device and external devices. The wire bonding technique is using the metal wire produced by wire bonding process for connection. It provides a better electrical performance, and limitation to design is also reduced so as to be more flexible in design.
FIG. 11 is a front view of an integrated circuit device according to a related art of the disclosure. An integrated circuit device usually includes a semiconductor substrate 1 on which an integrated circuit is implemented and fabricated as an integrated circuit chip and a package substrate 2. The semiconductor substrate 1 may include one or more core circuit regions 3 and one or more I/O (input/output) regions 4. The circuitry of the integrated circuit chip is implemented in the core circuit regions 3, and the I/O regions 4 are arranged for transmitting primary signals and power voltages, such as the system voltages VDD and VSS (not shown) and the ground voltage of the integrated circuit chip, to the package substrate 2. There are conducting lines 6 on the package substrate 2 for conducting and stretching the primary signals and the power voltages of the integrated circuit chip to the exterior of the integrated circuit device. The connection between the integrated circuit chip and the conducting lines 6 of the package substrate 2 is via wire bonding technique as mentioned above. Therefore, bonding pads 5 are placed in the I/O regions 4 for conducting wire bonding from the bonding pads 5 to the conducting lines 6 of the package substrate 2, and bonding wires 7 are thus established therebetween. The I/O regions 4 are usually located on the edge portion of the integrated circuit chip for ease of wire bonding process.